Technology Computer Aided Design (TCAD) uses physics-based computer simulations to design, analyze, and optimize semiconductor devices. TCAD represents the available physical knowledge of semiconductor processing and devices in terms of computer models. It represents devices as one dimensional, two-dimensional or three-dimensional finite-element or finite-volume models. Each element represents a piece of a certain material, with certain properties. TCAD numerically solves partial differential equations in space and/or time with appropriate boundary conditions. Typically this is done with finite element or finite volume analysis, although in some cases other methods for solving the partial differential equations can be used, such as particle/atomistic methods.
TCAD consists of two major components:    1. Process simulation is modeling semiconductor manufacturing processes. The simulation starts with the bare wafer and finishes with device structures. Processes such as implantation, diffusion, etching, growth, and deposition processes are simulated on a microscopic level.    2. Device simulation is modeling the semiconductor device operation on a microscopic level. By integrating microscopic currents, the electrical behavior is characterized. SPICE model parameters can be extracted from the simulated electrical characteristics.
Today's TCAD tools are capable of modeling the entire semiconductor manufacturing process and product performance with physical models of varying sophistication. Typically, from the simulation-derived device characteristics it is possible to extract model parameters for so-called (lumped) circuit models, i.e., which can be used in circuit simulators such as SPICE, which is often used as a central tool in Electronic Computer Aided Design (ECAD) to generate circuits.
While in TCAD typically few semiconductor devices are simulated with very high sophistication in terms of physical models, in ECAD more devices can be simulated, but the models for the individual devices are enormously reduced in complexity and sophistication. TCAD is applicable to all semiconductor devices, notably diodes, transistors, optical devices such as LEDs, lasers, specific test structures for process control, and others.
It is known to use circuit simulations during the manufacturing process of a semiconductor product. E.g. in JP 2001/188816 a method for manufacturing a transistor is described, where the gate length and the gate width are calculated using a circuit model. The calculation is performed on the basis of measurement results during the manufacturing.
TCAD allows an understanding of the manufacturing process and the operation of semiconductor devices and is therefore often used in research and development for the development of new processes and devices. Notably, it allows to save cost by reducing the number of costly experiments.
One goal of the present invention is to use TCAD to address issues of process and device variability in manufacturing. The simulation experiments in TCAD have the advantage that every process condition can be accurately controlled, and that arbitrary product performance characteristics can be determined. This is as opposed to real experiments, where the control of process steps may be difficult and subject to uncontrollable drift or variation in the equipment, and where the limitations of metrology can make it difficult, expensive or impossible to make measurements both in non-destructive and destructive measurements.
In particular, it is important to improve the systematic yield in semiconductor manufacturing of products where the structure of the semiconductor product is smaller than 130 nm. In this range the yield is increasingly subject to other limiting factors than just defects. Notably, addressing the parametric yield issues that arise through process and device variability is very important. Nonetheless, aspects of the present invention can be used advantageously also for structures above 130 nm.
Unfortunately, while TCAD simulations can be made very accurate, they are still very time consuming to execute. A single reasonably accurate 2-dimensional simulation of a MOSFET device may take on the order of an hour or more to execute. This deficiency severely limits the practicality of using TCAD in manufacturing, as opposed to design and development.
TCAD allows users to model the semiconductor manufacturing also in form of process models, where the semiconductor manufacturing process is described in terms of a number of input parameters and output parameters. Such a model is referred to as a TCAD Process Model. In accordance with an aspect of the invention, roughly described, simplified models or TCAD Process Compact Models (PCMs) can be derived from the TCAD Process Model, to describe the connection of input parameters and output parameters with less computational complexity. Input parameters may be process step characteristics, output parameters may be resulting product performance characteristics (including resulting process characteristics).
The invention can be particularly useful in the production ramp-up, when new processes and/or new products are introduced. Using simulation at this stage is advantageous because conventional methods for improvement rely only on measured data, which is not available in quantity during the production ramp. The use of simulation results to complement measured data is therefore especially valuable.
Also, the invention can be used for volume manufacturing. By applying the method according to the present invention to volume manufacturing the yield is enhanced for a great number of products. The benefit of the invention is therefore increased.
Further, the TCAD models can be applied to semiconductor manufacturing for the purpose of predicting parametric chip yields both during and subsequent to the wafer fabrication manufacturing process, i.e., to manipulate the manufacturing of either the same product batch or future product batches.
As well, the application of TCAD simulation, TCAD Process Model and/or TCAD Process Compact Model to semiconductor manufacturing processes at multiple semiconductor manufacturing facilities for the purpose of understanding the electrical differences between the similar but not identical processes is possible. In this case, measured data from each individual manufacturing process can be compared to a common TCAD simulation, TCAD Process Model and/or TCAD Process Compact Model in addition to being compared to each other. In this case they serve as a reference simulation which makes the process differences more understandable.
TCAD Process Compact Models can be obtained from TCAD simulations by performing a comprehensive Design of Experiment, consisting of individual experiments. In the Design of Experiments, input parameters are systematically varied and for each of the variants the output parameters are determined. As used herein, each combination of input parameter values and its resulting output parameter values is referred to as a “data set”, and two data sets are considered “different” if the value of at least one parameter in one data set differs from the value of the same parameter in the other data set. The collection of the data sets is sometimes referred to herein as a database, and as used herein, the term “database” does not necessarily imply any unity of structure. For example, two or more separate databases, when considered together, still constitute a “database” as that term is used herein.
The individual experiments are performed using TCAD simulations. From the set of performed experiments a simplified representation is derived, which can approximate for a given set of input parameters the output parameters. The simplified representation is typically called a response surface. The response surface can be represented by functions that are fitted to the performed TCAD experiments by regression, or by tabulation and interpolation of the experiments. Methodologies include response surfaces models that consist of polynomial expressions, which are obtained by least squares fitting; neural networks, in which a certain type of nonlinear function is fitted to data using optimization algorithms; or other mathematical functions or tables which can be further interpolated. The user can choose whether to use methodologies that have zero error for the experiments used for fitting, or whether a residual error in the experimental points is permitted.
FIG. 1 is a flowchart of steps that can be used in creating a TCAD Process Compact Model. In step 110, a TCAD simulation flow is created that replicates in simulation the product manufacturing process as well as the process of determining the product performance. In step 112, the TCAD simulation flow is parameterized with parameters of interest pi (i=1, . . . n) that allow to influence the manufacturing process, and extract the product performance characteristics as values r1 (i=1, . . . , m).
In step 114, a “Design of Experiment” table is set up with parametric variations for the parameters pi. Typically a systematic design is chosen such as a full factorial 3-level design. Alternatively, other designs can be chosen, such as face-centered-composite design, Taguchi design, or similar. As an example, for a full factorial with 2 parameters p1 and p2 with three levels each, for the parameter p1 the values 1, 2 and 3, and for the parameter the values 4, 5, 6, we obtain the following experimental matrix
ExperimentValue p1Value p2114215316424525626734835936
In step 116, the TCAD simulations are performed for each of the parameters, obtaining the product performance characteristics ri. Each of the experiments will usually take a considerable amount of time, as previously mentioned. Each of the experiments is an evaluation of the TCAD Process Model. As an example, for the above experimental design the resulting table is for 3 performance characteristics r1, r2, and r3
ExperimentValue p1Value p2Value r1Value r2Value r311451766.71828215620127.7183316723218.718342462571.38906525729132.3891626833223.389173473584.08554835840145.0855936945236.0855
In step 118, the TCAD Process Compact Model is derived by fitting functions rj(p1, . . . , pn) (j=1, . . . m) to the values in the table. This can be for example a polynomial function ri=A*p1^2+B*p2^2+C*p1*p2+D*p1+E*p2+F, with coefficients A, B, C, D, E, F to be determined by a least squares fitting process, resulting, for example, in the function r2(p1, p2, p3)=p1+2*p2+p1*p1+3+p1*p2. It should be noted that arbitrary other functions or representations can be used, among others nonlinear functions, fitted by a nonlinear optimization process, and tabulated functions with interpolation. In practice the choice of approximation function influences accuracy and performance of the approximation.
In step 120, The TCAD Process Compact Model is then checked for accuracy, by comparing values predicted by the TCAD Process Compact Model to values generated by the TCAD Process Model, either in the original experiments used for creating the TCAD Process Compact Model or in an additional set of test experiments. Although there is generally a certain loss of accuracy incurred by using an approximation function, an appropriate choice of “Design of Experiment” and an appropriate choice of approximation function can bring down the error to a reasonably small amount. It may be necessary to extend the Design of Experiment and/or change the approximation function to increase accuracy. This is performed by going back to step 114 or step 118.
Once the TCAD Process Compact Model is ready for use, the user has a simplified representation of the process-product relationships with a considerably lower size and implementational complexity. We therefore refer to it as a TCAD Process Compact Model, as opposed to a TCAD Process Model.
Example: As an illustration, we show a TCAD Process Model or TCAD Process Compact Model can contain a number of reasonable, but in no way complete process parameters and device characteristics, given for the example of a NMOS and a PMOS device in a CMOS process. Process parameters: p1) gate oxide thickness, p2) gate length, p3) halo implant tilt, p4) halo implant dose, p5) final RTP (rapid thermal annealing) temperature. The product performance characteristics are in this case r1) the threshold voltage VT, r2) the drive current ION, r3) the leakage current IOFF, r4) the switching speed of an inverter. A 3-level, full factorial DoE will result 243 experiments. Typically, gate oxide thickness as well as gate length or critical dimension are measured in the process, whereas halo implant tilt and dose as well as final RTP temperature are assumed to be given by process equipment settings and are not measured. Device performance characteristics VT, ION, IOFF are typically measured on the wafer, whereas inverter switching speed is not typically measured here and serves as a simple example for product performance. We will refer to this particular PCM below.
The use of TCAD Process Compact Models over the TCAD Process Model can have considerable advantages over the direct use of TCAD, even though there is an approximation error and therefore a loss of accuracy involved. TCAD tools are typically very complex, with the complexity rising with the growing accuracy of physical modeling. In practice, TCAD simulations take considerable time to perform. In addition, TCAD tools due to their complexity are in general sufficiently robust for a research and development environment, but not for a production environment. TCAD Process Compact Models, on the other side, have much less complexity, are therefore much more robust towards program failures, and can be evaluated in a much shorter time. As an example, a typical 2-dimensional process and device simulation using TCAD currently takes typically one hour, whereas a TCAD Process Compact Model can typically be evaluated in less than a microsecond. The disadvantage of the process compact model is that only the predefined output parameters are available, whereas each TCAD simulation typically generates a comprehensive representation of a semiconductor device that can subsequently be examined and probed in arbitrary ways. In the present targeted application, the latter is typically not required, and the TCAD Process Compact Model has therefore considerable practical advantages.
As no manufacturing process is perfect, the products obtained in real manufacturing are subject to manufacturing defects or their performance differs from the targeted results, resulting in non-optimum defect yield and non-optimum systematic yield. In semiconductor manufacturing, this problem of process defects and process variability is generally increasing with smaller technologies. Currently, it is addressed through yield management systems and simple models to correct the processes.
Some drawbacks of existing techniques are                that the known models for controlling and correcting processes at this point are very limited in their applicability, by not being able to encompass a sufficiently high number of process parameters and their interactions, or by not being able to accommodate the nonlinearity of some parameters.        that creating process models or process compact models from purely experimental data requires costly experiments.        that not all process parameters can be measured at all or at reasonable cost and are therefore not amenable to conventional process control and yield management        that not all product performance parameters can be measured at all or measured at reasonable cost, and are therefore not amenable to conventional process control and yield management.It is an object of the present invention to overcome the drawbacks of the prior art, in particular to provide economical methods for enhancing the systematic yield in semiconductor manufacturing, in particular the part of the systematic yield that is caused by nonoptimality, variation and drift in semiconductor manufacturing process steps. This object is addressed with a method, a system and a computer program product as described herein.        